System Level Design Techniques For Energy Efficient Embedded Systems

System-Level Design Techniques for Energy-Efficient Embedded Systems addresses the development and validation of co-synthesis techniques that allow an effective design of embedded systems with low energy dissipation. The book provides an overview of a system-level co-design flow, illustrating through examples how system performance is influenced at various steps of the flow including allocation, mapping, and scheduling. The book places special emphasis upon system-level co-synthesis techniques for architectures that contain voltage scalable processors, which can dynamically trade off between computational performance and power consumption. Throughout the book, the introduced co-synthesis techniques, which target both single-mode systems and emerging multi-mode applications, are applied to numerous benchmarks and real-life examples including a realistic smart phone.

System-Level Design Techniques for Energy-Efficient Embedded Systems addresses the development and validation of co-synthesis techniques that allow an effective design of embedded systems with low energy dissipation. The book provides an overview of a system-level co-design flow, illustrating through examples how system performance is influenced at various steps of the flow including allocation, mapping, and scheduling. The book places special emphasis upon system-level co-synthesis techniques for architectures that contain voltage scalable processors, which can dynamically trade off between computational performance and power consumption. Throughout the book, the introduced co-synthesis techniques, which target both single-mode systems and emerging multi-mode applications, are applied to numerous benchmarks and real-life examples including a realistic smart phone.

The pursuit of energy-efficient design in embedded systems has long become a critical issue. With improved energy effciency, the systems can incorporate more functionality and support better performances. Conventional design techniques innovate in hierarchical design levels from system, algorithm, architecture, to circuit. However, with the slowing of Moore's effect, efforts other than the circuit-level design are becoming more promising for the emerging applications. In this work, we investigate the core signal processing units in wireless communication systems and introduce a suite of new techniques from algorithm to architecture levels to improve energy effciency. First, we develop a comprehensive message truncation scheme to mitigate the decoding complexity of non-binary LDPC decoders. The dynamic channel state is exploited in the initialization stage to reduce message length. We then further prune the messages employing the inter-iteration decoding state of the core computational unit. The arithmetical logic and memory usage could be substantially decreased and therefore reduces the decoder power with the shorter messages. We also propose an adaptive offset correction mechanism to minimize the possible performance loss due to message truncation. And we develop a novel decoder architecture to accommodate the proposed algorithm designs. Second, we introduce a new non-binary LDPC decoder architecture with a low-power memory unit. As non-binary LDPC decoding is memory intensive and more than half of the power is consumed by memory access, the decoder power decreases significantly with the reduced memory power. Although over-scaling in memory power may introduce soft errors, LDPC codes could correct them with the error-resilience as channel codes. To find the extent to scale memory power, we train the decoder with the performance constraint under given channel states before the exploitations. Finally, we investigate the optimal sequential control policy for the signal tracking of GNSS receivers powered by renewable energy. With the proposed greedy and reinforcement learning algorithm, the receiver could opportunistically utilize the harvested energy by jointly considering the signal-noise ratio of the received signal and the available energy level. Different than conventional efforts, we could significantly maximize both energy efficiency and system service time with the desired positioning performances.

This book describes the state-of-the-art in energy efficient, fault-tolerant embedded systems. It covers the entire product lifecycle of electronic systems design, analysis and testing and includes discussion of both circuit and system-level approaches. Readers will be enabled to meet the conflicting design objectives of energy efficiency and fault-tolerance for reliability, given the up-to-date techniques presented.

Improving the energy efficiency has been the critical design goal for embedded systems. Recently, there have been some practical techniques employed to the power supply of embedded systems to extend the system's lifetime. One is renewable energy technologies such as energy harvesting from the environment to offer a sustainable, inexpensive, and maintenance-free alternative power source. Another is voltage overscaling (VOS) technique, which scales down the supply voltage to reduce the power consumption quadratically. However, most renewable energy sources are unstable and intermittent due to dynamically changing environmental conditions, and VOS inevitably incurs hardware errors, thereby posing new challenges to the improvements of energy efficiency in the embedded systems. In this dissertation, we identify four specific power-hungry signal processing units and develop a suite of techniques to improve the energy efficiency of embedded systems, by jointly exploiting the properties of the power source and the domain-specific information in the signal processing of embedded systems. First, we propose to dynamically adjust the modulation scheme to deal with time-varying wireless channel conditions and non-deterministic renewable energy levels in a coherent manner to maximize the data rate of RF circuits of the embedded systems. Then, we develop a progressive performance tuning approach to dynamically determine an acceptable signal processing performance in accordance with the changing energy level at runtime, by considering both of the non-deterministic characteristics of renewable energy and the unique relationship between signal processing performance and the required energy consumption. We also develop a link and energy adaptive UWB-based sensing technique to improve the detection time coverage and range coverage for self-sustained embedded applications. The proposed technique jointly exploits the link information between the transmitter and receiver of the UWB pulse radar, and the non-deterministic characteristics of the renewable energy, and dynamically adjusts the pulse repetition frequency of the UWB radar to enhance the sustainable operation under the unreliable energy supply. Finally, we present a low-power LDPC decoder design by exploiting inherent memory error statistics due to voltage scaling. After analyzing the error sensitivity to the decoding performance at different memory bits and memory locations in the LDPC decoder, we apply the scaled supply voltage to memory bits with high algorithmic error-tolerance capability to reduce the memory power consumption with minimal decoding performance loss.

To the hard-pressed systems designer this book will come as a godsend. It is a hands-on guide to the many ways in which processor-based systems are designed to allow low power devices. Covering a huge range of topics, and co-authored by some of the field’s top practitioners, the book provides a good starting point for engineers in the area, and to research students embarking upon work on embedded systems and architectures.

Modern embedded systems deploy several hardware accelerators, in a heterogeneous manner, to deliver high-performance computing. Among such devices, graphics processing units (GPUs) have earned a prominent position by virtue of their immense computing power. However, a system design that relies on sheer throughput of GPUs is often incapable of satisfying the strict power- and time-related constraints faced by the embedded systems. This thesis presents several system-level software techniques to optimize the design of GPU-based embedded systems under various graphics and non-graphics applications. As compared to the conventional application-level optimizations, the system-wide view of our proposed techniques brings about several advantages: First, it allows for fully incorporating the limitations and requirements of the various system parts in the design process. Second, it can unveil optimization opportunities through exposing the information flow between the processing components. Third, the techniques are generally applicable to a wide range of applications with similar characteristics. In addition, multiple system-level techniques can be combined together or with application-level techniques to further improve the performance. We begin by studying some of the unique attributes of GPU-based embedded systems and discussing several factors that distinguish the design of these systems from that of the conventional high-end GPU-based systems. We then proceed to develop two techniques that address an important challenge in the design of GPU-based embedded systems from different perspectives. The challenge arises from the fact that GPUs require a large amount of workload to be present at runtime in order to deliver a high throughput. However, for some embedded applications, collecting large batches of input data requires an unacceptable waiting time, prompting a trade-off between throughput and latency. We also develop an optimization technique for GPU-based applications to address the memory bottleneck issue by utilizing the GPU L2 cache to shorten data access time. Moreover, in the area of graphics applications, and in particular with a focus on mobile games, we propose a power management scheme to reduce the GPU power consumption by dynamically adjusting the display resolution, while considering the user's visual perception at various resolutions. We also discuss the collective impact of the proposed techniques in tackling the design challenges of emerging complex systems. The proposed techniques are assessed by real-life experimentations on GPU-based hardware platforms, which demonstrate the superior performance of our approaches as compared to the state-of-the-art techniques.

Until the late 1980s, information processing was associated with large mainframe computers and huge tape drives. During the 1990s, this trend shifted toward information processing with personal computers, or PCs. The trend toward miniaturization continues and in the future the majority of information processing systems will be small mobile computers, many of which will be embedded into larger products and interfaced to the physical environment. Hence, these kinds of systems are called embedded systems. Embedded systems together with their physical environment are called cyber-physical systems. Examples include systems such as transportation and fabrication equipment. It is expected that the total market volume of embedded systems will be significantly larger than that of traditional information processing systems such as PCs and mainframes. Embedded systems share a number of common characteristics. For example, they must be dependable, efficient, meet real-time constraints and require customized user interfaces (instead of generic keyboard and mouse interfaces). Therefore, it makes sense to consider common principles of embedded system design. Embedded System Design starts with an introduction into the area and a survey of specification models and languages for embedded and cyber-physical systems. It provides a brief overview of hardware devices used for such systems and presents the essentials of system software for embedded systems, like real-time operating systems. The book also discusses evaluation and validation techniques for embedded systems. Furthermore, the book presents an overview of techniques for mapping applications to execution platforms. Due to the importance of resource efficiency, the book also contains a selected set of optimization techniques for embedded systems, including special compilation techniques. The book closes with a brief survey on testing. Embedded System Design can be used as a text book for courses on embedded systems and as a source which provides pointers to relevant material in the area for PhD students and teachers. It assumes a basic knowledge of information processing hardware and software. Courseware related to this book is available at http://ls12-www.cs.tu-dortmund.de/~marwedel.

A unique feature of this textbook is to provide a comprehensive introduction to the fundamental knowledge in embedded systems, with applications in cyber-physical systems and the Internet of things. It starts with an introduction to the field and a survey of specification models and languages for embedded and cyber-physical systems. It provides a brief overview of hardware devices used for such systems and presents the essentials of system software for embedded systems, including real-time operating systems. The author also discusses evaluation and validation techniques for embedded systems and provides an overview of techniques for mapping applications to execution platforms, including multi-core platforms. Embedded systems have to operate under tight constraints and, hence, the book also contains a selected set of optimization techniques, including software optimization techniques. The book closes with a brief survey on testing. This third edition has been updated and revised to reflect new trends and technologies, such as the importance of cyber-physical systems and the Internet of things, the evolution of single-core processors to multi-core processors, and the increased importance of energy efficiency and thermal issues.