Wideband And Frequency Reconfigurable Millimeter Wave Transceiver And Transceiver Sub Block Design For The Multi Band Wireless Network On Chip Architecture

To meet the ever-increasing demands of computational power, multi-core processor integration has risen to new heights. The wireless network-on-chip is an emerging technology which seeks to augment inter-core interconnects on multi-core processors with high throughput, low power wireless interconnects. While this technology offers improvements in power and latency for on-chip communication networks, additional innovation is required to realize these system level benefits. To meet the speed, efficiency, and latency demands of the wireless network-on-chip architecture, highly efficient, wideband mmWave transceivers and sub-blocks must be designed.This thesis presents the design and analysis of mmWave transceiver sub-blocks as well as integrated transmitter and receiver systems. Two high-performance signal source circuits suitable for the requirements of the multi-band wireless network-on-chip architecture are presented. The first simultaneously provides multiple harmonically related outputs for non-overlapping frequency bands of a multi-band wireless network architecture. The signal source circuit consists of a 28 GHz voltage-controlled oscillator circuit which leverages transformer feedback for high output swing and low phase noise under a low voltage power supply and an efficient harmonic generation architecture. The second signal source leverages a phase-switched dual-mode inductor which presents different inductance under different phase excitation. In addition, a V-band receiver is presented which leverages a current re-use active feed-forward and feedback architecture for wide bandwidth demodulation and minimal power overhead. Additionally, the inductorless bandwidth extension technique reduces silicon area overhead. A W-band receiver is also proposed which leverages a dual-noise-matched active gain-boosted common-gate LNA architecture which provides wide input matching with reduced power overhead. Finally, a W-band transmitter based on a wideband direct-modulated on-off-keying oscillator is presented. Resonant pulse-generation is used to increase the initial energy across the resonant tank, dramatically reducing start-up time. Furthermore, dual active- and passive- Gm-boosting and adaptive amplitude control for reduced start-up time and decreased steady-state power consumption further improve the bandwidth of the direct modulation oscillator.The circuits described above were fabricated in a 65 nm CMOS technology and demonstrate state-of-the-art performance with low power consumption and low area overhead. The innovations in this work facilitate the low-power mmWave transceivers required for the multi-band WiNoC architecture.

This book presents design methods and considerations for digitally-assisted wideband millimeter-wave transmitters. It addresses comprehensively both RF design and digital implementation simultaneously, in order to design energy- and cost-efficient high-performance transmitters for mm-wave high-speed communications. It covers the complete design flow, from link budget assessment to the transistor-level design of different RF front-end blocks, such as mixers and power amplifiers, presenting different alternatives and discussing the existing trade-offs. The authors also analyze the effect of the imperfections of these blocks in the overall performance, while describing techniques to correct and compensate for them digitally. Well-known techniques are revisited, and some new ones are described, giving examples of their applications and proving them in real integrated circuits.

This book investigates and discusses the hardware design and implementation to achieve smart air interfaces with a reduced number of Radio Frequency (RF) transmitter and receiver chains, or even with a single reconfigurable RF-Frontend in the user terminal. Various hardware challenges are identified and addressed to enable the implementation of autonomous reconfigurable RF-Frontend architectures. Such challenges are (i) the conception of a transceiver with wide tuning range of at least up to 6 GHz, (ii) the system integration of reconfigurable technologies targeting current compact devices that demand voltages up to 100 V for adaptive controlling and (iii) the realization of a multiband and multistandard antenna module employing agile components to provide flexible frequency coverage. A solid design of a reconfigurable frontend is proposed from the RF part to the digital baseband. The system integration of different components in the reconfigurable RF-Frontend of a portable-oriented device architecture is demonstrated.

Modern transceiver systems require diversified design aspects as various radio and sensor applications have emerged. Choosing the right architecture and understanding interference and linearity issues are important for multi-standard cellular transceivers and software-defined radios. A millimeter-wave complementary metal–oxide–semiconductor (CMOS) transceiver design for multi-Gb/s data transmission is another challenging area. Energy-efficient short-range radios for body area networks and sensor networks have recently received great attention. To meet different design requirements, gaining good system perspectives is important. Wireless Transceiver Circuits: System Perspectives and Design Aspects offers an in-depth look at integrated circuit (IC) design for modern transceiver circuits and wireless systems. Ranging in scope from system perspectives to practical circuit design for emerging wireless applications, this cutting-edge book: Provides system design considerations in modern transceiver design Covers both systems and circuits for the millimeter-wave transceiver design Introduces four energy-efficient short-range radios for biomedical and wireless connectivity applications Emphasizes key building blocks in modern transceivers and transmitters, including frequency synthesizers and digital-intensive phase modulators Featuring contributions from renowned international experts in industry and academia, Wireless Transceiver Circuits: System Perspectives and Design Aspects makes an ideal reference for engineers and researchers in the area of wireless systems and circuits.

The Network-on-Chip (NoC) has been proposed as an enabling methodology to integrate many embedded cores on a single die. The existing method of implementing a NoC with planar metal interconnects is deficient due to high latency and significant power consumption arising from multi-hop links used in data exchanges. The millimeter (mm)-wave wireless NoC (WiNoC) is envisioned as a potential solution to these bottlenecks by replacing multi-hop wired paths with high-bandwidth, single-hop, long-range wireless links in mm-wave frequency. The WiNoC architecture necessitates a highly efficient wireless transceiver that can communicate at a data rate of tens of Gb/s.

Summarizes cutting-edge physical layer technologies for multi-mode wireless RF transceivers. Includes original contributions from distinguished researchers and professionals. Covers cutting-edge physical layer technologies for multi-mode wireless RF transceivers. Contributors are all leading researchers and professionals in this field.

Recent advances in the wireless communication market have led to the coexistence of several networks such as cellular network, personal area network (PAN), wireless local area network (WLAN), etc. along with several different air interfaces (802.11a, 802.11g, Bluetooth, wireless code division multiple access (WCDMA), etc.). Thus, all the wireless devices need to be compatible with the different communication standards while still keeping similar performance, smaller die area and lower power consumption. The need to enable the "global roaming'' capability between a wide variety of networks operating at different frequencies calls for the development of reconfigurable radio-frequency integrated circuits (RFICs) which can achieve maximum hardware sharing between different standards and across various functions. The objective of this dissertation is to present novel topologies for RF components and blocks that can yield a Si-based frequency-agile RF front-end. The targeted applications for this work are 5G multi-band wireless communication and reconfigurable short/long range phased arrays for automobile radars. However, the concept of the proposed reconfigurable RF elements is generic in nature and can be applied to all emerging applications which require on-chip reconfigurability at microwave and mm-wave frequencies.To demonstrate the concept of a reconfigurable RF front end, a Ka/V band-switchable TRX amplifier is developed in 0.13um BiCMOS SiGe process and a 18-50 GHz receiver is developed in 45nm SOI CMOS process. Unlike the traditional approach for a multi-band radio - where the dedicated single band transceivers composed of fixed RF components are designed and multiplexed with the help of switches - the proposed idea utilizes the switches inside each RF block; thus, adding the reconfigurability inside each block and eliminating the need for separate front-ends. However, the catch in the latter approach is to maintain the RF performance while still being able to save the real estate and power consumption. The proposed Ka/V band-switchable TRX amplifier consists of a band-switchable LNA, a band-switchable PA, and integrated T/R switches which saves a lot of area. The band-switch functionality is realized using thin-film microstrip based shunt stubs with reverse saturated SiGe switches. Design techniques for switch loss reduction and size miniaturizations are presented. This work illustrates that with the optimization of switch loss, appropriate selection of each block between wideband or bandswitching topology and co-design of RF blocks, a highly integrated multi-band transceiver can be designed with the minimal degradation to the RF performance compared to state-of-the-art dedicated single band transceivers. To further explore reconfigurable transceivers, a direct quadrature down-conversion mixer first receiver with active channel select filters has been designed. The receiver supports 200MHz instantaneous RF bandwidth and can be reconfigured to receive any 200 MHz channel within 18-50 GHz frequency range. With the ever-evolving wireless standards like 4G/5G/6G, equipment manufacturers are required to add more functionality into the chips while still maintaining the backward compatibility with previous standards or fallback option to lower frequency bands. A low power, highly integrated, multi-band and multi-standard chipset has thus become a requisite in commercial products. The proposed concept of in-block reconfigurability and the presented design techniques to realize mm-wave frequency reconfigurable transceivers have a huge potential in this regard.

This book presents architectural and circuit techniques for wireless transceivers to achieve multistandard and low-voltage compliance. It provides an up-to-date survey and detailed study of the state-of-the-art transceivers for modern single- and multi-purpose wireless communication systems. The book includes comprehensive analysis and design of multimode reconfigurable receivers and transmitters for an efficient multistandard compliance.

This book describes design techniques for wideband quadrature LO generation for software defined radio transceivers, with frequencies spanning 4GHz to around 80GHz. The authors discuss several techniques that can be used to reduce the cost and/or power consumption of one of the key component of the RF front-end, the quadrature local oscillator. The discussion includes simple and useful insights into quadrature VCOs, along with numerous examples of practical techniques.