Integrated Optical Transmitter And Receiver

This document reports the results of a one-year program, based on a technical proposal submitted to and accepted by DARPA, to develop a technology for realizing a GaAlAs/GaAs monolithic integrated optoelectronic transmitter for high-speed fiber-optic communications applications. The primary objectives were to: (1) determine a suitable approach for integrating optical and electronic devices in terms of compatible device processing and fabrication, (2) design a simplified high-speed transmitter based on the integration approach which will serve as a building block for future more sophisticated designs, (3) develop the transmitter materials technology, (4) develop the transmitter device components, and (5) fabricate and demonstrate the integrated transmitter. At the end of the programs, all of the objectives were realized except for the demonstration of a functional transmitter. A selective epitaxial growth technique using a dielectric mask was developed for process/fabrication compatibility of the laser with planar ion-implanted GaAs electronic devices with 1 micron-type geometries. Based on this integration approach, a nominal 1-4 Gb/s transmitter set utilizing standard cleaved mirror lasers and field-effect transistor (FET)/Gunn logic drivers was designed, process/fabrication steps defined, and a fabrication mask set generated.

This book presents high-performance data transmission over plastic optical fibers (POF) using integrated optical receivers having good properties with multilevel modulation, i.e. a higher sensitivity and higher data rate transmission over a longer plastic optical fiber length. Integrated optical receivers and transmitters with high linearity are introduced for multilevel communication. For binary high-data rate transmission over plastic optical fibers, an innovative receiver containing an equalizer is described leading also to a high performance of a plastic optical fiber link. The cheap standard PMMA SI-POF (step-index plastic optical fiber) has the lowest bandwidth and the highest attenuation among multimode fibers. This small bandwidth limits the maximum data rate which can be transmitted through plastic optical fibers. To overcome the problem of the plastic optical fibers high transmission loss, very sensitive receivers must be used to increase the transmitted length over POF. The plastic optical fiber limited bandwidth problem can be decreased by using multilevel signaling like multilevel pulse amplitude modulation or by using an equalizer for binary data transmission.

This chapter covers the field of semiconductor photonic integrated circuits (PIC) used in access, metro, long-haul, and undersea telecommunication networks. Although there are many variants to implementing optical integration; the focus is on monolithic integration where multiple semiconductor devices, up to many hundreds in some cases, are integrated onto the same substrate. Monolithic integration poses the greatest technical challenge and the biggest opportunity for bandwidth and size scaling. The PICs discussed here are based on the two most popular semiconductor material systems: Groups III–V indium phosphide-based devices and Group IV silicon-based devices. The chapter also covers the historical evolution of the technology from the decades old original proposal to the current day terabit/s class, coherent PICs.

Integrated Fiber-Optic Receivers covers many aspects of the design of integrated circuits for fiber-optic receivers and other high-speed serial data links. Fundamental concepts are explained at the system level, circuit level, and semiconductor device level. Techniques for extracting timing information from the random data stream are described in considerable detail, as are all other aspects of receiver design. Integrated Fiber-Optic Receivers is organized in two parts. Part I covers the theory of communications systems as it applies to high-speed PAM (Pulse Amplitude Modulation) systems. The primary emphasis is on clock recovery circuits. Because theoretical concepts are generally grasped more easily by example, Part II is devoted to circuit design issues that illustrate example realizations of architectures described in Part I. Part II presents the transistor-level design, and measured results, of fundamental building blocks and test circuits. For practicing engineers, more than just reporting on the results of specific circuits, this book serves as a tutorial on the design of integrated high-speed broadband PAM data systems, such as: repeaters in long-haul, fiber-optic, trunk-lines transceivers for use in LANs and WANs; read channels for high-density data storage devices; and wireless communication handsets. Integrated Fiber-Optic Receivers may be used as a text for advanced courses in both analog circuit design and communication systems.

Updates the advancements made in the level of achievable integration of optical circuits and components in the last ten years--highlighting the commercial success of particular devices as well as introducing multiple facets of integrated optics.

This book presents several circuits that are required for the full integration of an optical transmitter in standard CMOS. The main emphasis is placed on high-speed receivers with a bitrate of up to 1 Gb/s. The possibility of including the photodiode in a receiver is investigated and the problems encountered are discussed.

This book provides a broad overview of current research in optical interconnect technologies and architectures. Introductory chapters on high-performance computing and the associated issues in conventional interconnect architectures, and on the fundamental building blocks for integrated optical interconnect, provide the foundations for the bulk of the book which brings together leading experts in the field of optical interconnect architectures for data communication. Particular emphasis is given to the ways in which the photonic components are assembled into architectures to address the needs of data-intensive on-chip communication, and to the performance evaluation of such architectures for specific applications.

Integrated photonics has emerged as an I/O technology set to disrupt the communication fabric of many-core computer systems. The optical technology uses wavelength-division-multiplexing and a high degree of integration in order to surpass electrical I/O in both throughput and energy by more than an order of magnitude. However, integrated photonic systems need to be properly designed in order to reach their full potential, and electronic design techniques need to be updated to take full advantage of tight integration with photonics. This thesis explores the engineering of integrated photonics systems, focusing on optical data receiver design and techniques. We develop a representation of a photonic communication system based on circuit and device models, and perform a system-level optimization to find the optimal operating point for each of the components. This operating point sets the specification for the receiver circuits developed. An equivalent model of the receiver is used to develop a host of split-photodiode topologies that enable new ways to implement double-data-rate and decision-feedback-equalization operation. The receivers are fabricated as part of an integrated photonic test platform, and the measurements are detailed. This work presents the first-ever monolithically-integrated optical receiver with pA-sensitivity in a zero-foundry-change, commercial SOI CMOS logic process, and the first-ever monolithically-integrated optical receiver in a bulk CMOS memory process as part of a 9x5Gb/s DWDM receiver bank.