High Speed And Lower Power Technologies

This book explores up-to-date research trends and achievements on low-power and high-speed technologies in both electronics and optics. It offers unique insight into low-power and high-speed approaches ranging from devices, ICs, sub-systems and networks that can be exploited for future mobile devices, 5G networks, Internet of Things (IoT), and data centers. It collects heterogeneous topics in place to catch and predict future research directions of devices, circuits, subsystems, and networks for low-power and higher-speed technologies. Even it handles about artificial intelligence (AI) showing examples how AI technology can be combined with concurrent electronics. Written by top international experts in both industry and academia, the book discusses new devices, such as Si-on-chip laser, interconnections using graphenes, machine learning combined with CMOS technology, progresses of SiGe devices for higher-speed electronices for optic, co-design low-power and high-speed circuits for optical interconnect, low-power network-on-chip (NoC) router, X-ray quantum counting, and a design of low-power power amplifiers. Covers modern high-speed and low-power electronics and photonics. Discusses novel nano-devices, electronics & photonic sub-systems for high-speed and low-power systems, and many other emerging technologies like Si photonic technology, Si-on-chip laser, low-power driver for optic device, and network-on-chip router. Includes practical applications and recent results with respect to emerging low-power systems. Addresses the future perspective of silicon photonics as a low-power interconnections and communication applications.

The increasing demand for extremely high-data-rate communications has urged researchers to develop new communication systems. Currently, wireless transmission with more than one Giga-bits-per-second (Gbps) data rates is becoming essential due to increased connectivity between different portable and smart devices. To realize Gbps data rates, millimeter-wave (MMW) bands around 60 GHz is attractive due to the availability of large bandwidth of 9 GHz. Recent research work in the Gbps data rates around 60 GHz band has focused on short-range indoor applications, such as uncompressed video transfer, high-speed file transfer between electronic devices, and communication to and from kiosk. Many of these applications are limited to 10 m or less, because of the huge free space path loss and oxygen absorption for 60 GHz band MMW signal. This book introduces new knowledge and novel circuit techniques to design low-power MMW circuits and systems. It also focuses on unlocking the potential applications of the 60 GHz band for high-speed outdoor applications. The innovative design application significantly improves and enables high-data-rate low-cost communication links between two access points seamlessly. The 60 GHz transceiver system-on-chip provides an alternative solution to upgrade existing networks without introducing any building renovation or external network laying works.

Dramatic increases in processing power have rapidly scaled on-chip aggregate bandwidths into the Tb/s range. This necessitates a corresponding increase in the amount of data communicated between chips, so as not to limit overall system performance. To meet the increasing demand for interchip communication bandwidth, researchers are investigating the use of high-speed optical interconnect architectures. Unlike their electrical counterparts, optical interconnects offer high bandwidth and negligible frequency-dependent loss, making possible per-channel data rates of more than 10 Gb/s. High-Speed Photonics Interconnects explores some of the groundbreaking technologies and applications that are based on photonics interconnects. From the Evolution of High-Speed I/O Circuits to the Latest in Photonics Interconnects Packaging and Lasers Featuring contributions by experts from academia and industry, the book brings together in one volume cutting-edge research on various aspects of high-speed photonics interconnects. Contributors delve into a wide range of technologies, from the evolution of high-speed input/output (I/O) circuits to recent trends in photonics interconnects packaging. The book discusses the challenges associated with scaling I/O data rates and current design techniques. It also describes the major high-speed components, channel properties, and performance metrics. The book exposes readers to a myriad of applications enabled by photonics interconnects technology. Learn about Optical Interconnect Technologies Suitable for High-Density Integration with CMOS Chips This richly illustrated work details how optical interchip communication links have the potential to fully leverage increased data rates provided through complementary metal-oxide semiconductor (CMOS) technology scaling at suitable power-efficiency levels. Keeping the mathematics to a minimum, it gives engineers, researchers, graduate students, and entrepreneurs a comprehensive overview of the dynamic landscape of high-speed photonics interconnects.

Distributing power in high speed, high complexity integrated circuits has become a challenging task as power levels exceeding tens of watts have become commonplace while the power supply is plunging toward one volt. This book is dedicated to this important subject. The primary purpose of this monograph is to provide insight and intuition into the behavior and design of power distribution systems for high speed, high complexity integrated circuits.

Wafer-scale integration has long been the dream of system designers. Instead of chopping a wafer into a few hundred or a few thousand chips, one would just connect the circuits on the entire wafer. What an enormous capability wafer-scale integration would offer: all those millions of circuits connected by high-speed on-chip wires. Unfortunately, the best known optical systems can provide suitably ?ne resolution only over an area much smaller than a whole wafer. There is no known way to pattern a whole wafer with transistors and wires small enough for modern circuits. Statistical defects present a ?rmer barrier to wafer-scale integration. Flaws appear regularly in integrated circuits; the larger the circuit area, the more probable there is a ?aw. If such ?aws were the result only of dust one might reduce their numbers, but ?aws are also the inevitable result of small scale. Each feature on a modern integrated circuit is carved out by only a small number of photons in the lithographic process. Each transistor gets its electrical properties from only a small number of impurity atoms in its tiny area. Inevitably, the quantized nature of light and the atomic nature of matter produce statistical variations in both the number of photons de?ning each tiny shape and the number of atoms providing the electrical behavior of tiny transistors. No known way exists to eliminate such statistical variation, nor may any be possible.

This book reviews the state of the art of very high speed digital integrated circuits. Commercial applications are in fiber optic transmission systems operating at 10, 40, and 100 Gb/s, while the military application is ADCs and DACs for microwave radar. The book contains detailed descriptions of the design, fabrication, and performance of wideband Si/SiGe-, GaAs-, and InP-based bipolar transistors. The analysis, design, and performance of high speed CMOS, silicon bipolar, and III-V digital ICs are presented in detail, with emphasis on application in optical fiber transmission and mixed signal ICs. The underlying physics and circuit design of rapid single flux quantum (RSFQ) superconducting logic circuits are reviewed, and there is extensive coverage of recent integrated circuit results in this technology. Contents: Preface (M J W Rodwell); High-Speed and High-Data-Bandwidth Transmitter and Receiver for Multi-Channel Serial Data Communication with CMOS Technology (M Fukaishi et al.); High-Performance Si and SiGe Bipolar Technologies and Circuits (M Wurzer et al.); Self-Aligned Si BJT/SiGe HBT Technology and Its Application to High-Speed Circuits (K Washio); Small-Scale InGaP/GaAs Heterojunction Bipolar Transistors for High-Speed and Low-Power Integrated-Circuit Applications (T Oka et al.); Prospects of InP-Based IC Technologies for 100-Gbit/S-Class Lightwave Communications Systems (T Enoki et al.); Scaling of InGaAs/InAlAs HBTs for High Speed Mixed-Signal and mm-Wave ICs (M J W Rodwell); Progress Toward 100 GHz Logic in InP HBT IC Technology (C H Fields et al.); Cantilevered Base InP DHBT for High Speed Digital Applications (A L Gutierrez-Aitken et al.); RSFQ Technology: Physics and Devices (P Bunyk et al.); RSFQ Technology: Circuits and Systems (D K Brock). Readership: Researchers, industrialists and academics in electrical and electronic engineering.

MOS technology has rapidly become the de facto standard for mixed-signal integrated circuit design due to the high levels of integration possible as device geometries shrink to nanometer scales. The reduction in feature size means that the number of transistor and clock speeds have increased significantly. In fact, current day microprocessors contain hundreds of millions of transistors operating at multiple gigahertz. Furthermore, this reduction in feature size also has a significant impact on mixed-signal circuits. Due to the higher levels of integration, the majority of ASICs possesses some analog components. It has now become nearly mandatory to integrate both analog and digital circuits on the same substrate due to cost and power constraints. This book presents some of the newer problems and opportunities offered by the small device geometries and the high levels of integration that is now possible. The aim of this book is to summarize some of the most critical aspects of high-speed analog/RF communications circuits. Attention is focused on the impact of scaling, substrate noise, data converters, RF and wireless communication circuits and wireline communication circuits, including high-speed I/O. Contents: Achieving Analog Accuracy in Nanometer CMOS (M P Flynn et al.); Self-Induced Noise in Integrated Circuits (R Gharpurey & S Naraghi); High-Speed Oversampling Analog-to-Digital Converters (A Gharbiya et al.); Designing LC VCOs Using Capacitive Degeneration Techniques (B Jung & R Harjani); Fully Integrated Frequency Synthesizers: A Tutorial (S T Moon et al.); Recent Advances and Design Trends in CMOS Radio Frequency Integrated Circuits (D J Allstot et al.); Equalizers for High-Speed Serial Links (P K Hanumolu et al.); Low-Power, Parallel Interface with Continuous-Time Adaptive Passive Equalizer and Crosstalk Cancellation (C P Yue et al.). Readership: Technologists, scientists, and engineers in the field of high-speed communication circuits. It can also be used as a textbook for graduate and advanced undergraduate courses.

Power consumption is a key limitation in many high-speed and high-data-rate electronic systems today, ranging from mobile telecom to portable and desktop computing systems, especially when moving to nanometer technologies. Ultra Low-Power Electronics and Design offers to the reader the unique opportunity of accessing in an easy and integrated fashion a mix of tutorial material and advanced research results, contributed by leading scientists from academia and industry, covering the most hot and up-to-date issues in the field of the design of ultra low-power devices, systems and applications.

This book brings together innovative modelling, simulation and design techniques in CMOS, SOI, GaAs and BJT to achieve successful high-yield manufacture for low-power, high-speed and reliable-by-design analogue and mixed-mode integrated systems.