Design And Simulation Of Short Channel Sihfo2 Ferroelectric Field Effect Transistor Fefet

"Non-volatile memories using ferroelectric capacitors, known as Ferroelectric Random Access Memory (FRAM) have been studied for many years, but they suffer from loss of data during read out process. Ferroelectric Field Effect Transistors (FeFETs), which are based on ferroelectric gate oxide, have been of recent interest for non-volatile memory applications. The FeFETs utilize the polarization of the ferroelectric layer incorporated into the transistor gate stack to control the channel conductivity. Therefore, in FeFET devices, the read out process is non-destructive because it is only processed by measuring the resistivity in the channel region. The drain current-gate voltage (ID-VG) characteristics of FeFETs exhibit a voltage shift due to polarization hysteresis known as the 'memory window', an important figure of merit of a FeFET that provides a window for the read voltage. A dielectric layer between semiconductor layer and the ferroelectric is required to reduce charge injection effect, and to compensate lattice mismatch between the ferroelectric and the semiconductor. In addition, a non-ferroelectric interfacial layer may form between the semiconductor and the ferroelectric layer. However, this dielectric layer causes a voltage drop since the system becomes equivalent to two serial capacitors. It also causes an electric field that opposes the polarization. Using a high permittivity material such as HfO2 reduces the voltage drop and the effect of depolarization. To date, the majority of the work involving FeFETs has been based on conventional ferroelectric materials such as Lead Zirconate Titanate (PZT) and Strontium Bismuth Tantalate (SBT). These materials are not compatible with standard IC processing and furthermore scaling thicknesses in PZT and SBT result in loss of polarization characteristics. Recently, ferroelectricity has been reported in doped hafnium oxide thin films with dopants such as Si, Al, and Gd. Particularly, silicon doped hafnium oxide (Si:HfO2) has shown promise. In this material, the remnant polarization considerably increases by decreasing the layer thickness. The lower permittivity of Si:HfO2 compared to that of PZT and SBT, allows to employ thinner films that reduce fringing effects. This study focuses on employing Si:HfO2 in short channel FeFETs. The study has two major objectives. First, to show that short channel FeFETs can be accomplished with large memory window. Second, to demonstrate the role of bulk layer thickness and permittivity on FeFET performance. N-channel metal oxide semiconductor FET (N-MOSFET) with printed channel length of 26 nm has been designed with Si:HfO2 as the ferroelectric layer, and TiN as the gate electrode. The effects of buffer layer thickness and permittivity and ferroelectric layer thickness on the memory window have been explored using Silvaco Atlas software that employs ferroelectric FET device physics developed by Miller et al. Polarization characteristics reported for Si:HfO2 have been incorporated in this model. The simulations performed in this study have shown that using Si:HfO2 as a ferroelectric material makes it possible to accomplish short channel FeFETs with good performance even without using buffer layers. This means it is possible to minimize depolarization effects. Using Si:HfO2 as a ferroelectric layer makes it possible to accomplish highly scaled and ultra-low-power FeFETs."--Abstract.

In recent years, research on microelectronics has been specifically focused on the proposition of efficient alternative methodologies and materials to fabricate feasible integrated circuits. This book provides a general background of thin film transistors and their simulations and constructions. The contents of the book are broadly classified into two topics: design and simulation of FETs and construction of FETs. All the authors anticipate that the provided chapters will act as a single source of reference for the design, simulation and construction of FETs. This edited book will help microelectronics researchers with their endeavors and would be a great addition to the realm of semiconductor physics.

Circuit simulation is widely used for the design of circuits, both discrete and integrated. Device modeling is an impor tant aspect of circuit simulation since it is the link between the physical device and the sim ulate d device. Curren tly available circuit simulation programs provide a variety of built-in models. Many circuit designers use these built-in models whereas some incorporate new models in the circuit sim ulation programs. Understanding device modeling with particular emphasis on circuit simulation will be helpful in utilizing the built-in models more efficiently as well as in implementing new models. SPICE is used as a vehicle since it is the most widely used circuit sim ulation program. How ever, some issues are addressed which are not directly appli cable to SPICE but are applicable to circuit simulation in general. These discussions are useful for modifying SPICE and for understanding other simulation programs. The gen eric version 2G. 6 is used as a reference for SPICE, although numerous different versions exist with different modifications. This book describes field effect transistor models commonly used in a variety of circuit sim ulation pro grams. Understanding of the basic device physics and some familiarity with device modeling is assumed. Derivation of the model equations is not included. ( SPICE is a circuit sim ulation program available from EECS Industrial Support Office, 461 Cory Hall, University of Cali fornia, Berkeley, CA 94720. ) Acknowledgements I wish to express my gratitude to Valid Logic Systems, Inc.